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    SEGMENT ADDRESSING REGISTERS
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    Computer Technologies  Programming Languages  Assembler SEGMENT ADDRESSING REGISTERS

    SEGMENT ADDRESSING REGISTERS

    SEGMENT ADDRESSING REGISTERS

    The 8086 CPU divides its memory addressing into four areas. The four areas are code, stack, data, and extra data. The current location of these sections is controlled by four segment addressing registers. The 8086 architecture uses these to expand the addressing range of the CPU. The basic addressing range of a normal 16 bit CPU is 65536 bytes. By adding segmented memory offsets into the memory addressing hardware, the addressing range of the 8086 CPU is increased to 20 bits or 1,048,576 bytes. This is done by shifting the four 16 bit segment registers over a nibble (four bits) and adding them to the other index registers to complete the 20 bit real address. With this system, the CPU can address one megabyte of memory. The only complexity to the memory system is that it is divided into four blocks that have a maximum of 64KB each. This limits the active addressing range of the CPU to 256KB maximum at one time. Because there are two 16 bit words used to complete an address, this book uses “offset” to refer to the address in the lower 16 bit range (0 - 65535). References to the segment address part, which is the upper 16 bit word, use “SEG” or “segment.”

    CS Code Segment

    This is used with the IP (instruction pointer) register to index the next instruction for program logic execution.
    How the CPU calculates a code address with the instruction pointer:

     IP
                    |X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|
    +CS         |X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|
    =real address  |X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|

    If IP=7 and CS=3 then real address=37H as shown:

     IP                       |0|0|0|0|0|0|0|0|0|0|0|0|0|1|1|1|
    +CS               |0|0|0|0|0|0|0|0|0|0|0|0|0|0|1|1|
    =real address     |0|0|0|0|0|0|0|0|0|0|0|0|0|0|1|1|0|1|1|1|

    DS Data Segment

    This is used as the primary data area. It is indexed by BX, SI, DI (when DI is not executing string instructions), and offsets without an index register.

    SS Stack Segment

    This is used as the stacking data area. It is indexed by SP and BP. Note that when BX is used with BP in calculating an address offset, then the segment used is the SS.

    ES Extra Segment

    This is used as the extra data area. It is indexed by DI during the execution of string instructions as the destination address.

    Overrides can be used with most instructions to force an index register to reference data with a different segment register than what is normally used. For example, data indexed by BX normally comes from the DS segment, but with an override, data can come from the CS segment as CS:[BX].

     

     


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